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gnu: u-boot: Use search-patches.
* gnu/packages/bootloaders.scm (%u-boot-rockchip-inno-usb-patch, %u-boot-allow-disabling-openssl-patch): Remove variables, move comments. (u-boot)[source]: Use search-patches. * gnu/packages/patches/u-boot-allow-disabling-openssl.patch: Comment. * gnu/packages/patches/u-boot-rockchip-inno-usb.patch: Remove E-Mail metadata. Replace diffstat with comments. Reapply to U-Boot v2024.10. Change-Id: I760a2e81bddfc2a80ef149fe1ac4496cbbd937a0 Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
This commit is contained in:
parent
9e85818258
commit
56c6466887
3 changed files with 30 additions and 178 deletions
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@ -745,33 +745,21 @@ The SUBDIR argument defaults to \"efi/Guix\", as it is also the case for
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tree binary files. These are board description files used by Linux and BSD.")
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tree binary files. These are board description files used by Linux and BSD.")
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(license license:gpl2+)))
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(license license:gpl2+)))
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(define %u-boot-rockchip-inno-usb-patch
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;; Fix regression in 2020.10 causing freezes on boot with USB boot enabled.
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;; See https://gitlab.manjaro.org/manjaro-arm/packages/core/uboot-rockpro64/-/issues/4
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;; and https://patchwork.ozlabs.org/project/uboot/patch/20210406151059.1187379-1-icenowy@aosc.io
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(search-patch "u-boot-rockchip-inno-usb.patch"))
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(define %u-boot-allow-disabling-openssl-patch
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;; Fixes build of u-boot 2021.10 without openssl
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;; https://lists.denx.de/pipermail/u-boot/2021-October/462728.html
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(search-patch "u-boot-allow-disabling-openssl.patch"))
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(define u-boot
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(define u-boot
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(package
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(package
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(name "u-boot")
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(name "u-boot")
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(version "2024.10")
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(version "2024.10")
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(source (origin
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(source
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(patches
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(origin
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(list %u-boot-rockchip-inno-usb-patch
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(method git-fetch)
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%u-boot-allow-disabling-openssl-patch))
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(uri (git-reference
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(method git-fetch)
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(url "https://source.denx.de/u-boot/u-boot.git")
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(uri (git-reference
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(commit (string-append "v" version))))
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(url "https://source.denx.de/u-boot/u-boot.git")
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(file-name (git-file-name name version))
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(commit (string-append "v" version))))
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(sha256
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(file-name (git-file-name name version))
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(base32 "0yrhb0izihv47p781dc4cp0znc5g225ayl7anz23c6jdrmfbpz2h"))
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(sha256
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(patches (search-patches "u-boot-allow-disabling-openssl.patch"
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(base32
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"u-boot-rockchip-inno-usb.patch"))))
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"0yrhb0izihv47p781dc4cp0znc5g225ayl7anz23c6jdrmfbpz2h"))))
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(build-system gnu-build-system)
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(build-system gnu-build-system)
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(native-inputs
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(native-inputs
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(list bison
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(list bison
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@ -10,6 +10,9 @@ CONFIG_FIT_PRELOAD to remove fit_pre_load_data, which depends on openssl.
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Addendum 2024-01-18, Herman Rimm: Patch updated to leave out upstreamed
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Addendum 2024-01-18, Herman Rimm: Patch updated to leave out upstreamed
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diffs with CONFIG_FIT_PRELOAD.
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diffs with CONFIG_FIT_PRELOAD.
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---
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Fixes build of U-Boot v2021.10 without openssl. See:
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https://lists.denx.de/pipermail/u-boot/2021-October/462728.html
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diff --git a/tools/kwbimage.c b/tools/kwbimage.c
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diff --git a/tools/kwbimage.c b/tools/kwbimage.c
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index 4dce495ff0..976174ae77 100644
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index 4dce495ff0..976174ae77 100644
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@ -1,149 +1,7 @@
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Downloaded from:
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https://patchwork.ozlabs.org/project/uboot/patch/20210406151059.1187379-1-icenowy@aosc.io
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From patchwork Tue Apr 6 15:10:59 2021
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From: Icenowy Zheng <icenowy@aosc.io>
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From: Icenowy Zheng <icenowy@aosc.io>
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||||||
To: Simon Glass <sjg@chromium.org>, Kever Yang <kever.yang@rock-chips.com>,
|
Date: Tue, 6 Apr 2021 23:10:59 +0800
|
||||||
Frank Wang <frank.wang@rock-chips.com>,
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Jagan Teki <jagan@amarulasolutions.com>
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Cc: u-boot@lists.denx.de,
|
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Icenowy Zheng <icenowy@aosc.io>
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Subject: [PATCH] phy: rockchip: inno-usb2: fix hang when multiple controllers
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Subject: [PATCH] phy: rockchip: inno-usb2: fix hang when multiple controllers
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exit
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exit
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Date: Tue, 6 Apr 2021 23:10:59 +0800
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The OHCI and EHCI controllers are both bound to the same PHY. They will
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The OHCI and EHCI controllers are both bound to the same PHY. They will
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both do init and power_on operations when the controller is brought up
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both do init and power_on operations when the controller is brought up
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@ -166,23 +24,26 @@ Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
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Fixes: ac97a9ece14e ("phy: rockchip: Add Rockchip USB2PHY driver")
|
Fixes: ac97a9ece14e ("phy: rockchip: Add Rockchip USB2PHY driver")
|
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Tested-by: Peter Robinson <pbrobinson@gmail.com>
|
Tested-by: Peter Robinson <pbrobinson@gmail.com>
|
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---
|
---
|
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 21 +++++++++++++++++++
|
Fix U-Boot v2020.10 regression, freezing on boot with USB boot enabled:
|
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1 file changed, 21 insertions(+)
|
https://gitlab.manjaro.org/manjaro-arm/packages/core/uboot-rockpro64/-/issues/4
|
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Downloaded from:
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https://patchwork.ozlabs.org/project/uboot/patch/20210406151059.1187379-1-icenowy@aosc.io
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diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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index 70e61eccb7..ce36db94a7 100644
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index 43f6e020a6a..2086192445d 100644
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -64,6 +64,8 @@ struct rockchip_usb2phy {
|
@@ -47,6 +47,8 @@ struct rockchip_usb2phy {
|
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void *reg_base;
|
struct regmap *reg_base;
|
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struct clk phyclk;
|
struct clk phyclk;
|
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const struct rockchip_usb2phy_cfg *phy_cfg;
|
const struct rockchip_usb2phy_cfg *phy_cfg;
|
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+ int init_count;
|
+ int init_count;
|
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+ int power_on_count;
|
+ int power_on_count;
|
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};
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};
|
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|
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static inline int property_enable(void *reg_base,
|
static inline int property_enable(struct regmap *base,
|
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@@ -106,6 +108,10 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
|
@@ -98,6 +100,10 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
|
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struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
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const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
|
const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
|
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|
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|
@ -193,7 +54,7 @@ index 70e61eccb7..ce36db94a7 100644
|
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property_enable(priv->reg_base, &port_cfg->phy_sus, false);
|
property_enable(priv->reg_base, &port_cfg->phy_sus, false);
|
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|
||||||
/* waiting for the utmi_clk to become stable */
|
/* waiting for the utmi_clk to become stable */
|
||||||
@@ -120,6 +126,10 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
|
@@ -112,6 +118,10 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
|
||||||
struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
||||||
const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
|
const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
|
||||||
|
|
||||||
|
@ -204,8 +65,8 @@ index 70e61eccb7..ce36db94a7 100644
|
||||||
property_enable(priv->reg_base, &port_cfg->phy_sus, true);
|
property_enable(priv->reg_base, &port_cfg->phy_sus, true);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@@ -132,6 +142,10 @@ static int rockchip_usb2phy_init(struct phy *phy)
|
@@ -123,6 +133,10 @@ static int rockchip_usb2phy_init(struct phy *phy)
|
||||||
const struct rockchip_usb2phy_port_cfg *port_cfg = us2phy_get_port(phy);
|
struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
+ priv->init_count++;
|
+ priv->init_count++;
|
||||||
|
@ -215,7 +76,7 @@ index 70e61eccb7..ce36db94a7 100644
|
||||||
ret = clk_enable(&priv->phyclk);
|
ret = clk_enable(&priv->phyclk);
|
||||||
if (ret && ret != -ENOSYS) {
|
if (ret && ret != -ENOSYS) {
|
||||||
dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret);
|
dev_err(phy->dev, "failed to enable phyclk (ret=%d)\n", ret);
|
||||||
@@ -154,6 +168,10 @@ static int rockchip_usb2phy_exit(struct phy *phy)
|
@@ -137,6 +151,10 @@ static int rockchip_usb2phy_exit(struct phy *phy)
|
||||||
struct udevice *parent = dev_get_parent(phy->dev);
|
struct udevice *parent = dev_get_parent(phy->dev);
|
||||||
struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
struct rockchip_usb2phy *priv = dev_get_priv(parent);
|
||||||
|
|
||||||
|
@ -226,7 +87,7 @@ index 70e61eccb7..ce36db94a7 100644
|
||||||
clk_disable(&priv->phyclk);
|
clk_disable(&priv->phyclk);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
@@ -294,6 +312,9 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
|
@@ -281,6 +299,9 @@ static int rockchip_usb2phy_probe(struct udevice *dev)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue