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gnu: fftgen: Update to 0-1.3378b77.

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* gnu/packages/fpga.scm (fftgen): Update to 0-1.3378b77.
[arguments]: Activate tests.
[native-inputs]: Add python-minimal, verilator, which, fftw and bc.

Change-Id: If35ac1d053bf8b93fea07c1d89681e6dc7591ad4
Signed-off-by: Andreas Enge <andreas@enge.fr>
This commit is contained in:
Cayetano Santos 2025-08-26 17:02:27 +02:00 • committed by Andreas Enge
parent 6c654afd88
commit c6f060fc43
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1 changed files with 5 additions and 4 deletions
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gnu/packages/fpga.scm
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@ -821,8 +821,8 @@ and @file{.h} files.")
(license license:lgpl3))) (license license:lgpl3)))
(define-public fftgen (define-public fftgen
(let ((commit "1d75a992efd0528edea128a903aafdabe133cb08") ;no releases (let ((commit "3378b77d83a98b06184656a5cb9b54e50dfe4485") ;no releases
(revision "0")) (revision "1"))
(package (package
(name "fftgen") (name "fftgen")
(version (git-version "0" revision commit)) (version (git-version "0" revision commit))
@ -834,10 +834,10 @@ and @file{.h} files.")
(file-name (git-file-name name version)) (file-name (git-file-name name version))
(sha256 (sha256
(base32 (base32
"0qq874yalzpjdwnxhc5df8a0ifywv29wcncb09945x56xplvkcmd")))) "1rvln871wjkbbqnv88jnx328xlhn5sgbr8fglk3ajnd9rwgiq3jg"))))
(build-system gnu-build-system) (build-system gnu-build-system)
(arguments (arguments
`(#:tests? #f ;no tests `(#:test-target "bench-test"
#:make-flags '("CFLAGS=-g -O2") ;default flags lack -O2 #:make-flags '("CFLAGS=-g -O2") ;default flags lack -O2
#:phases (modify-phases %standard-phases #:phases (modify-phases %standard-phases
(delete 'configure) (delete 'configure)
@ -846,6 +846,7 @@ and @file{.h} files.")
(let ((bin (string-append (assoc-ref outputs "out") (let ((bin (string-append (assoc-ref outputs "out")
"/bin"))) "/bin")))
(install-file "sw/fftgen" bin))))))) (install-file "sw/fftgen" bin)))))))
(native-inputs (list bc fftw python-minimal verilator which))
(synopsis "Generic pipelined FFT core generator") (synopsis "Generic pipelined FFT core generator")
(description "fftgen produces @acronym{FFT, fast-Fourier transforms} (description "fftgen produces @acronym{FFT, fast-Fourier transforms}
hardware designs in Verilog.") hardware designs in Verilog.")