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gnu: python-cocotb: Update to 2.0.0b1.
* gnu/packages/electronics.scm (python-cocotb): Update to 2.0.0b1. [arguments] <:#test-flags>: Update. <:#phases>: Remove 'check-vhdl. Change-Id: I3c4faf4eb1c332246b9417ecd30a5c681ae61789
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1 changed files with 5 additions and 18 deletions
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@ -566,34 +566,21 @@ for sigrok.")
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(define-public python-cocotb
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(package
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(name "python-cocotb")
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(version "1.9.2")
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(version "2.0.0b1")
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(source
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(origin
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(method git-fetch)
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(uri (git-reference
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(url "https://github.com/cocotb/cocotb")
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(commit (string-append "v" version))))
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(url "https://github.com/cocotb/cocotb")
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(commit (string-append "v" version))))
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(file-name (git-file-name name version))
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(sha256
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(base32 "19mybnhqa2jz134jj8686310fniav5nldiq0y7kbgml81ppai87c"))))
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(base32 "14aas4vw9cb9krnvw21vfmwqivvc2cwzi9rvmvap6xcw9f2dsyy9"))))
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(build-system pyproject-build-system)
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(arguments
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(list
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#:test-flags
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;; Tests requiring a verilog simulator.
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#~(list "-k" (string-join
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(list "not parallel_cocotb"
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"cocotb"
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"vhdl_libraries_multiple")
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" and not "))
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#:phases
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#~(modify-phases %standard-phases
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;; Tests requiring a vhdl simulator.
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(add-after 'check 'check-vhdl
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(lambda* (#:key tests? #:allow-other-keys)
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(when tests?
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(setenv "SIM" "nvc")
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(invoke "pytest" "-vv" "-k" "vhdl_libraries_multiple")))))))
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#~(list "-k" "not test_toplevel_library")));requires questasim simulator
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(native-inputs
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(list iverilog
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nvc
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